Zilog Z16C35 Uživatelský manuál stáhnout pdf (Strana 263)

Application Note

Using SCC with Z8000 in SDLC Protocol

12-8

RECEIVE OPERATION

(Continued)

If receive overrun error is made, a special condition

interrupt occurs. The SCC presents vector %2E to the

CPU, and the service routine located at address %447A is

executed. Register RR1 is read to determine which error

occurred. Appropriate action to correct the error should be

taken by the user at this point. Error Reset and Reset

Highest IUS commands are given to the SCC before

returning to the main program so that the other low-priority

interrupts can occur.

In addition to searching the data stream for flags, the

receiver also scans for seven consecutive 1s, which

indicates an abort condition. This condition is reported in

the Break/Abort bit (D7) in RR0. This is one of many

possible external status conditions. As a result transitions

of this bit can be programmed to cause an external status

interrupt. The abort condition is terminated when a zero is

received, either by itself or as the leading zero of a flag.

The receiver leaves Hunt mode only when a flag is found.

SOFTWARE

Software routines are presented in the following pages.

These routines can be modified to include various other

options (e.g., SDLC Loop, Digital Phase Locked Loop

etc.). By modifying the WR10 register, different encoding

methods (e.g., NRZI, FM0, FM1) other than NRZ can be

used.

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Zilog Z16C35 Uživatelský manuál Strana 263