Zilog ZUSBOPTS Uživatelský manuál stáhnout pdf (Strana 105)

100

101

UM017105-0511 Menu Bar

Zilog Developer Studio II – ZNEO™

User Manual

c. To use ISA-compatible mode, select the ISA Mode Enabled checkbox.

d. To use Active High polarity, select the

Polarity Active High checkbox.

e. To use 16-bit data width, select the

16 Bit Data Width checkbox.

f. Select the number of wait states from the

Wait States drop-down menu.

g. Select the number of post-read wait states from the

Post Read Wait States drop-

down menu.

h. Select the appropriate GPIO port from the

GPIO Port drop-down menu. This list

box is only available if the chip select is an alternate function on more than one

GPIO port.

3. Select the internal, watchdog, or external clock source in the Source area.

4. Select the appropriate clock frequency in the Clock Frequency (MHz) area or enter the

clock frequency in the

Other field. For the emulator, this frequency must match the

clock oscillator on Y4. For the development kit, this frequency must match the clock

oscillator on Y1. The emulator clock cannot be supplied from the target application

board.

The Clock Frequency value is used even when the Simulator is selected as the Debug Tool.

The frequency is used when converting clock cycles to elapsed times in seconds, which can

be viewed in the Debug Clock window when running the simulator.

5. Click

Configure Flash. The Target Flash Settings dialog box is displayed; see

Figure 62.

Note:

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