
eZ80F92 Development Kit
User Manual
eZ80Acclaim!
®
Development Platform UM013911-0607
24
I/O Functionality
The eZ80190 microprocessor features General-Purpose I/O functionality
at Port A. The eZ80F92 device does not incorporate this Port A feature.
The eZ80Acclaim!
®
Development Platform provides additional I/O func-
tionality, featuring GPIO for devices without Port A, an LED matrix, a
modem reset, and two user triggers.
Table 5. CPU Bus Connector J8*
Signal Pin # Function Direction
A[0:7] 3–10 Address Bus, Low Byte Output
A[8:15] 13–20 Address Bus, High Byte Output
A[16:23] 23–30 Address Bus, Upper Byte Output
RD 33 Read Signal Output
RESET
35 Push Button Reset Output
BUSACK
37 CPU Bus Acknowledge Signal Output
NMI
39 Nonmaskable Interrupt Input
D[0:7] 43–50 Data Bus Bidirectional
CS[0:3] 53–56 Chip Selects
MREQ
57 Memory Request Output
WR
34 WRITE Signal Output
INSTRD
36 Instruction Fetch Output
BUSREQ
38 CPU Bus Request signal
PHI 40 Clock output of the CPU Output
Note: *All of the signals except BUSACK and INSTRD are driven by low-voltage
CMOS technology (LVC) drivers.
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