Zilog Z16F2810 Uživatelský manuál stáhnout pdf (Strana 15)

ZNEO

Z16F Series Development Kit

User Manual

UM020205-0908 ZNEO Z16F Series Development Board

External Interface Headers JP1, JP2, and JP4

External interface headers JP1, JP2, and JP4 are provided in Schematics

on page 12.

J3 IN

IrDA interface

disabled.

J6 OUT

8-bit MDS interface

disabled.

J6 IN

8-bit MDS interface

enabled.

J7 OUT External Flash Write Protect disabled. X

J7 IN External Flash Write Protect enabled.

Note: * These jumpers must not be OUT at the same time.

Table 2. ZNEO Jumper Settings (Continued)

Jumper Status Function Default

1 2 ... 10 11 12 13 14 15 16 17 18 19 20

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Zilog Z16F2810 Uživatelský manuál Strana 15