Zilog Z16F2810 Uživatelský manuál stáhnout pdf (Strana 10)

ZNEO

Z16F Series Development Kit

User Manual

UM020205-0908 ZNEO Z16F Series Development Board

Table 1. ZNEO Physical Memory Layout

Each internal memory space has a distinct purpose. Internal non-volatile

memory contains executable program code and constant data. ZNEO

CPU based devices have internal non-volatile memory starting at address

00_0000H. For example, a device equipped with 128 K of Flash has

internal non-volatile memory starting at address

00_0000H and ending at

address

01_FFFFH.

Internal RAM contains non-constant data and the stack. Executable

program code can also reside in internal RAM, if desired. ZNEO CPU

based devices have internal RAM ending at address

FF_BFFFH, while the

beginning address (and hence the total extent of this space) is device

dependent. For example, a device equipped with 4 K of RAM has internal

RAM starting at address

FF_B000H and ending at address FF_BFFFH.

Since internal RAM is accessed using 16-bit addressing, the lowest possi-

ble starting address for internal RAM on any device is

FF_8000H.

ZNEO CPU based devices support 8 K of internal I/O memory located at

addresses

FF_E000H–FF_FFFFH. This memory contains CPU control

registers and other SFRs, on-chip peripherals, and memory-mapped I/O

ports.

Memory Address Chip Selects

Internal I/O Memory & SFRs FF_FFFFH–FF_E000H

External Memory Mapped Peripherals

(optional)

FF_DFFFH–FF_C800H CS3 – CS5

External Memory at CS2 (optional) FF_C7FFH–FF_C000H CS2

Internal RAM FF_BFFFH–FF_8000H

External Memory at CS2 (optional) F0_0000H CS2

External Memory at CS1 (optional) 80_0000H CS1

External Memory at CS0 (optional) 02_0000H CS0

Internal Non-Volatile Memory 01_FFFFH–00_0000H

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 19 20

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Zilog Z16F2810 Uživatelský manuál Strana 10