Zilog EZ80F91 Uživatelský manuál stáhnout pdf (Strana 72)

eZ80F91 Development Kit

User Manual

UM014220-0508 Appendix A—General Array Logic Equations

//A18=A2,A17=A1,A16=A0

output

nCS_EX/* synthesis loc="P17"*/,//enables memory on the

//Expansion Module

nmemen1 /* synthesis loc="P18"*/,//enables memory

//the Development Platform

nmemen2 /* synthesis loc="P19"*/,

nmemen3 /* synthesis loc="P20"*/,

nmemen4 /* synthesis loc="P21"*/,

nEM_EN /* synthesis loc="P24"*/,//enables LED and

//Port A emulation

nDIS_FL /* synthesis loc="P25"*/,

nL_RD /* synthesis loc="P23"*/

;

wire nCS_EX,

nmemen1,

nmemen2,

nmemen3,

nmemen4;

//wire MOD_DIS =

((nmemen1==0)|(nmemen2==0)|(nmemen3==0)|(nmemen4==0));//if any

//of the signals is Low,

//Flash on the Module will be

//disabled if nDIS_FL is High

wire nEXP_EN = ~((nCS0==0)&(A7==0)&(A6==1));

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Zilog EZ80F91 Uživatelský manuál Strana 72